H01L 21/02

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Description

Class  H01L : SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR


Subclass 21/02: Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof Manufacture or treatment of semiconductor devices or of parts thereof

Recent Patents

Patent #TitleFiling DateIssue DatePatent Owner
10566184 Process of depositing silicon nitride (SiN) film on nitride semiconductorMar 30, 18Feb 18, 20Sumitomo Electric Industries Ltd.
10566196 Method for manufacturing bonded SOI waferMar 14, 16Feb 18, 20Shin-Etsu Handotai Co Ltd.
10566192 Transistor structure having buried island regionsMay 07, 15Feb 18, 20CAMBRIDGE ELECTRONICS, INC.
10566447 Single column compound semiconductor bipolar junction transistor with all-around baseNov 20, 17Feb 18, 20International Business Machine Corporation
10566426 Forming silicon oxide layers by radical oxidation and semiconductor device with silicon oxide layerDec 20, 17Feb 18, 20Infineon Technologies AG
10565917 Monolithic micro LED displayDec 23, 16Feb 18, 20Intel Corp.
10566243 Semiconductor device having multiple work functions and manufacturing method thereofMar 13, 18Feb 18, 20SEMICONDUCTOR MANUFACTURING INTERNATIONATIONAL (SHANGHAI) CORPORATION; Semiconductor Manufacturing International (Beijing) Corporation;
10566187 Ultrathin atomic layer deposition film accuracy thickness controlMar 20, 15Feb 18, 20Lam Research Corporation
10566189 Deep junction electronic device and process for manufacturing thereofMay 31, 17Feb 18, 20Laser Systems & Solutions of Europe (LASSE)
10563014 Dielectric film forming compositionFeb 28, 18Feb 18, 20Fujifilm Electronic Materials U.S.A., Inc.
10566206 Systems and methods for anisotropic material breakthroughDec 27, 16Feb 18, 20Applied Materials Inc.
10566186 Methods of encapsulationNov 02, 18Feb 18, 20Lam Research Corporation
10566438 Nanosheet transistor with dual inner airgap spacersApr 02, 18Feb 18, 20IBM Corporation
10566232 Post-etch treatment of an electrically conductive featureJul 18, 17Feb 18, 20Taiwan Semiconductor Manufacturing Co., Ltd.
10566439 High power gallium nitride electronics using miscut substratesMay 28, 19Feb 18, 20NEXGEN POWER SYSTEMS, INC.
10566193 Synthesis and processing of Q-carbon, graphene, and diamondAug 08, 16Feb 18, 20North Carolina State University
10566417 Self-forming spacers using oxidationJun 12, 18Feb 18, 20International Business Machine Corporation
10566224 Protecting partially-processed products during transportSep 27, 16Feb 18, 20SKYWORKS SOLUTIONS, INC.
10566246 Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devicesAug 17, 18Feb 18, 20International Business Machine Corporation
10566181 Substrate processing apparatuses and substrate processing methodsAug 02, 18Feb 18, 20ASM IP Holding B.V.

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Recent Publications

Publication #TitleFiling DatePub DatePatent Owner
2020/0058,486 WAFER FLATNESS CONTROL USING BACKSIDE COMPENSATION STRUCTURESep 24, 18Feb 20, 20Not available
2020/0058,493 METHOD OF PRODUCING A COMPONENT OF A DEVICE, AND THE RESULTING COMPONENTS AND DEVICESOct 24, 19Feb 20, 20Not available
2020/0058,489 FORMING A PLANAR SURFACE OF A III-NITRIDE MATERIALOct 05, 17Feb 20, 20Not available
2020/0058,495 DIELECTRIC LAYER, INTERCONNECTION STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOFAug 14, 18Feb 20, 20Taiwan Semiconductor Manufacturing Co., Ltd.
2020/0057,105 WAFER SURFACE TEST PREPROCESSING DEVICE AND WAFER SURFACE TEST APPARATUS HAVING THE SAMEJan 22, 19Feb 20, 20Not available
2020/0058,500 NANOWIRE BENDING FOR PLANAR DEVICE PROCESS ON (001) Si SUBSTRATESOct 24, 19Feb 20, 20Not available
2020/0058,494 AROMATIC UNDERLAYERJul 03, 19Feb 20, 20Not available
2020/0058,491 THICK PSEUDOMORPHIC NITRIDE EPITAXIAL LAYERSSep 03, 19Feb 20, 20Not available
2020/0058,482 METHOD FOR POLISHING SILICON CARBIDE SUBSTATEFeb 06, 18Feb 20, 20Fujimi Incorporated
2020/0056,286 SEMICONDUCTOR PROCESSING REACTOR AND COMPONENTS THEREOFOct 10, 19Feb 20, 20ASM IP Holding B.V.
2020/0058,488 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE USING THE SAMEJun 13, 19Feb 20, 20Not available
2020/0056,302 Elimination of Basal Plane Dislocation and Pinning the Conversion Point Below the Epilayer Interface for SiC Power Device ApplicationsMar 01, 18Feb 20, 20Not available
2020/0058,542 METHOD OF FORMING ENGINEERED WAFERSNov 27, 18Feb 20, 20Not available
2020/0058,499 FILM FORMING METHOD AND FILM FORMING APPARATUSAug 13, 19Feb 20, 20Not available
2020/0058,490 GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR SUBSTRATEDec 25, 17Feb 20, 20Not available
2020/0058,485 HYDROGEN VENTILATION OF CMOS WAFERSAug 16, 19Feb 20, 20Not available
2020/0058,497 Silicon nitride forming precursor controlAug 20, 18Feb 20, 20Not available
2020/0058,483 SEMICONDUCTOR SUBSTRATE PROCESSING METHODAug 08, 19Feb 20, 20Not available
2020/0058,487 METHOD AND APPARATUS TO TREAT SEMICONDUCTOR SUBSTRATEAug 15, 19Feb 20, 20Not available
2020/0058,498 METHOD OF DEPOSITING SILICON NITRIDEAug 15, 19Feb 20, 20Not available

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