Parallel processing computer including interconnected operation units
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United States of America Patent
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-
Mar 28, 1989
Grant Date -
N/A
app pub date -
Dec 18, 1985
filing date -
Dec 24, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A plurality of operation units are connected to one another. The operation units include a processor, a buffer memory, and a data transfer control circuit connected between the processor and the buffer memory for controlling the data input-output with the buffer memories in the other of the operation units. The buffer memories and the data transfer control circuit are connected with one another by data buses, respectively.
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