Processor array and parallel data processing methods
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United States of America Patent
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Apr 27, 2004
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N/A
app pub date -
May 22, 2000
filing date -
May 22, 2000
priority date (Note) -
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Abstract
An array of processor elements has multiple instruction streams and multiple data streams broadcast to all of the processor elements. The processor elements are each connected to multiple neighbouring processor elements within a cruciate neighbourhood. The architecture is suitable for use in fine-grained applications. The array may have a processor element for each pixel of an image. The array is preferably provided on a single integrated circuit having 10,000 or more processor elements.
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