Integrated circuits with at least one layer that has more than one preferred interconnect direction, and method for manufacturing such IC's

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United States of America Patent

PATENT NO 7036105
SERIAL NO

10229311

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Abstract

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Some embodiments of the invention provide an integrated-circuit chip that has a design based on a wiring model that allows at least a particular wiring layer to have more than one preferred wiring directions. Other embodiments provide a method of manufacturing an integrated circuit ('IC') that has a plurality of wiring layers. The method specifies a layout of the IC by using a wiring model that specifies more than one preferred wiring direction for at least a region of a particular wiring layer. The method then uses the layout to fabricate the integrated circuit.

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Patent Owner(s)

  • CADENCE DESIGN SYSTEMS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Caldwell, Andrew Santa Clara, CA 119 1473
Jacques, Etienne Bristol, GB 32 625
Teig, Steven Menlo Park, CA 333 6508

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