Method for improved pre-metal planarization
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United States of America Patent
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Dec 17, 1996
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N/A
app pub date -
Mar 29, 1995
filing date -
Dec 23, 1993
priority date (Note) -
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Abstract
A method of forming an integrated circuit wherein a planarization step is been performed before the primary metal deposition step, but after deposition of the adhesion and barrier layers. Thus the adhesion and barrier layers are present on the sidewalls of contact holes, but do not underlie the whole extent of the primary metallization.
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