Method of CMP of polysilicon
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United States of America Patent
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Feb 26, 2002
Issued Date -
N/A
app pub date -
Jan 8, 2001
filing date -
Nov 15, 1997
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Abstract
An improved and new process for fabricating a planarized structure of polysilicon plugs embedded in silicon oxide has been developed. The planarizing method comprises a two-step CMP process in which the first CMP step comprises chemical-mechanical polishing using a first polishing slurry which is selective to polysilicon and the second CMP step comprises chemical-mechanical polishing using a second polishing slurry which polishes both polysilicon and silicon oxide. The processing time of the two-step CMP process is significantly less than the processing time of a one-step CMP process requiring an over-polish period. This reduced processing time reduces the cost of the CMP operation and at the same time produces a product with superior planarity and without reliability degradation due to residues of polysilicon.
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