Systems and methods of routing data to facilitate error correction
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United States of America Patent
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May 23, 2006
Grant Date -
Feb 3, 2005
app pub date -
Jul 29, 2003
filing date -
Jul 29, 2003
priority date (Note) -
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Abstract
Systems and methods are provided for detecting and correcting bit errors in data structures. A data block and/or data structure is partitioned into adjacent bit pair domains, such that a single adjacent bit pair from each memory device is assigned to a given adjacent bit pair domain. The adjacent bit pair domain data is transmitted over a bus having a plurality of data paths, such that data bits associated with a given memory device are transmitted over a same data path.
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