Arbitration in multiprocessor communication node
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United States of America Patent
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-
Aug 14, 1990
Issued Date -
N/A
app pub date -
Nov 14, 1988
filing date -
Apr 6, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An architecture for a switching node of a communication network includes a dedicated hardware Layer 1 processing portion and a Layer 2 and 3 processing portion based on multiple programmed general purpose processors. An array of such processors are used with an arbitration scheme for selecting which of the processors is to be used for any given Layer 2 or Layer 3 process. The architecture allows the node's capacity to be expanded by simply adding more processors to handle increased traffic.
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