Blocked matrix multiplication for computers with hierarchical memory
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 24, 1992
Grant Date -
N/A
app pub date -
Jan 22, 1990
filing date -
Jan 22, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A matrix multiplication method that is particularly well suited for use with a computer having hierarchical memory. The A and B term matrices are broken down into blocks and a sum of a series of outer products is computed in order to generate product matrix blocks. Reads to cache or other faster, high-level storage and writes to main memory are interleaved with the calculations in order to reduce or elimiante processor stalling. Individual blocks may be computed by separate processors without requiring communication of intermediate results.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully