Low latency coherency protocol for a multi-chip multiprocessor system

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United States of America Patent

PATENT NO 7577794
APP PUB NO 20060080513A1
SERIAL NO

10961751

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Abstract

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Methods and apparatus for reducing the amount of latency involved when accessing, by a remote device, data residing in a cache of a processor are provided. For some embodiments, virtual channels may be utilized to conduct request/response transactions between the remote device and processor that satisfy a set of associated coherency rules.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beukema, Bruce L Hayfield, US 26 472
Hoover, Russell D Rochester, US 51 1996
Kriegel, Jon K Rochester, US 34 1106
Mejdrich, Eric O Rochester, US 75 3505
Woodward, Sandra S Rochester, US 13 390

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