Structure for flash memory cells
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United States of America Patent
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May 21, 2013
Grant Date -
Jan 13, 2011
app pub date -
Apr 22, 2010
filing date -
Jul 8, 2009
priority date (Note) -
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Abstract
A flash memory cell structure is provided. A semiconductor structure includes a semiconductor substrate, a floating gate overlying the semiconductor substrate, a word-line adjacent to the floating gate, an erase gate adjacent to a side of the floating gate opposite the word-line, a first sidewall disposed between the floating gate and the word-line, and a second sidewall disposed between the floating gate and the erase gate. The first sidewall has a first characteristic and the second sidewall has a second characteristic. The first characteristic is different from the second characteristic.
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